HEF4093B-652

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HEF4093B

Quad 2-input NAND Schmitt trigger

Rev. 06 — 2 December 2009

Product data sheet

1.General description

The HEF4093B is a quad two-input NAND gate. Each input has a Schmitt trigger circuit. The gate switches at different points for positive-going and negative-going signals. The difference between the positive voltage (VT+) and the negative voltage (VT−) is defined as hysteresis voltage (VH).

It operates over a recommended VDD power supply range of 3V to 15V referenced to VSS (usually ground). Unused inputs must be connected to VDD, VSS, or another input. It is also suitable for use over both the industrial (−40°C to +85°C) and automotive (−40°C to +125°C) temperature ranges.

2.Features

󰂄󰂄󰂄󰂄󰂄󰂄

Schmitt trigger input discriminationFully static operation

5V, 10V, and 15V parametric ratings

Standardized symmetrical output characteristics

Operates across the automotive temperature range from −40°C to +125°CComplies with JEDEC standard JESD 13-B

3.Applications

󰂄Wave and pulse shapers󰂄Astable multivibrators󰂄Monostable multivibrators

4.Ordering information

Table 1.Ordering information

All types operate from −40°C to +125°CType numberHEF4093BPHEF4093BT

PackageNameDIP14SO14

Description

plastic dual in-line package; 14leads (300mil)

plastic small outline package; 14leads; bodywidth3.9 mm

VersionSOT27-1SOT108-1

NXP Semiconductors

HEF4093B

Quad 2-input NAND Schmitt trigger

5.Functional diagram

1A1B2A2B3A3B4A4B132681091211134YnAnY001aag1041Y2Y3YnB001aag105Fig 1.Functional diagramFig 2.Logic diagram (one gate)6.Pinning information

6.1Pinning

1A1B1Y2Y2A2BVSS1234567001aag10614VDD134B124AHEF4093B114Y103Y983B3AFig 3.Pin configuration6.2Pin description

Table 2.Symbol1A to 4A1B to 4B

Pin description

Pin1, 5, 8, 122, 6, 9, 13

Descriptioninputinput

Product data sheetRev. 06 — 2 December 2009 2 of 14

NXP Semiconductors

HEF4093B

Quad 2-input NAND Schmitt trigger

Table 2.Symbol1Y to 4YVDDVSS

Pin description …continued

Pin3, 4, 10, 11147

Descriptionoutputsupply voltageground (0 V)

7.Functional description

Table 3.InputnALLHH

[1]

Function table[1]

Output

nBLHLH

nYHHHL

H = HIGH voltage level; L = LOW voltage level.

8.Limiting values

Table 4.Limiting values

In accordance with the Absolute Maximum Rating System (IEC 60134). Voltages are referenced to VSS=0V (ground).SymbolVDDIIKVIIOKII/OIDDTstgTambPtot

Parametersupply voltageinput clamping currentinput voltage

output clamping currentinput/output currentsupply currentstorage temperatureambient temperaturetotal power dissipation

Tamb = −40 °C to +125 °CDIP14SO14

[1][2]

Conditions

VI<−0.5V or VI>VDD + 0.5 VVO<−0.5V or VO>VDD + 0.5 V

Min−0.5-−0.5---−65−40---

Max+18±10VDD + 0.5±10±1050+150+125750500100

UnitVmAVmAmAmA°C°CmWmWmW

power dissipationper output

For DIP14 packages: above Tamb = 70 °C, Ptot derates linearly with 12mW/K.For SO14 packages: above Tamb = 70 °C, Ptot derates linearly with 8mW/K.

Product data sheetRev. 06 — 2 December 2009 3 of 14

NXP Semiconductors

HEF4093B

Quad 2-input NAND Schmitt trigger

9.Recommended operating conditions

Table 5.SymbolVDDVITambΔt/ΔV

Recommended operating conditionsParametersupply voltageinput voltageambient temperature

input transition rise and fall rate

in free airVDD = 5 VVDD = 10 VVDD = 15 VConditions

Min30−40---Max15VDD+1253.750.50.08

UnitVV°Cμs/Vμs/Vμs/V

10.Static characteristics

Table 6.Static characteristics

VSS = 0V; VI=VSS or VDD; unless otherwise specified.SymbolParameterVOH

HIGH-level output voltage

Conditions|IO| < 1 μA

VDD5 V10 V15 V

VOL

LOW-level output voltage

|IO| < 1 μA

5 V10 V15 V

IOH

HIGH-level output current

VO = 2.5VVO = 4.6VVO = 9.5VVO = 13.5V

IOL

LOW-level output current

VO = 0.4VVO = 0.5VVO = 1.5V

IIIDD

input leakage currentsupply current

5 V5 V10 V15 V5 V10 V15 V15V

5 Vallvalid input

combinations;10 VIO=0A

15 V

Tamb = −40 °CTamb = +25 °CTamb = +85 °CTamb = +125°CUnitMin4.959.9514.95---−1.7−0.−1.6−4.20.1..2-----Max---0.050.050.05-------±0.10.250.51.0-Min4.959.9514.95---−1.4−0.5−1.3−3.40.51.33.4-----Max---0.050.050.05-------±0.10.250.51.07.5

Min4.959.9514.95---−1.1−0.36−0.9−2.40.360.92.4-----Max---0.050.050.05-------±1.07.515.030.0-Min4.959.9514.95---−1.1−0.36−0.9−2.40.360.92.4-----Max---0.050.050.05-------±1.07.515.030.0-VVVVVVmAmAmAmAmAmAmAμAμAμAμApF

input

capacitance

Product data sheetRev. 06 — 2 December 2009 4 of 14

NXP Semiconductors

HEF4093B

Quad 2-input NAND Schmitt trigger

11.Dynamic characteristics

Table 7.Dynamic characteristics

Tamb = 25 °C; CL = 50 pF; tr = tf ≤ 20ns; wave forms see Figure4; test circuit see Figure5; unless otherwise specified.SymbolParametertPHL

HIGH to LOW propagation delay

ConditionsnA or nB to nY

VDD5V10V15V

tPLH

LOW to HIGH propagation delay

nA or nB to nY

5V10V15V

tTHL

HIGH to LOW output transition time

nY to LOW

5V10V15V

tTLH

LOW to HIGH output transition time

nA or nB to HIGH

5V10V15V

[1]

Extrapolation formula[1]63 ns + (0.55 ns/pF)CL29 ns + (0.23 ns/pF)CL22 ns + (0.16 ns/pF)CL58 ns + (0.55 ns/pF)CL29 ns + (0.23 ns/pF)CL22 ns + (0.16 ns/pF)CL10 ns + (1.00 ns/pF)CL9 ns + (0.42ns/pF)CL6 ns + (0.28 ns/pF)CL10 ns + (1.00 ns/pF)CL9 ns + (0.42ns/pF)CL6 ns + (0.28 ns/pF)CL

Min------------

Typ9040308030603020603020

Max1858060170806012060401206040

Unitnsnsnsnsnsnsnsnsnsnsnsns

Typical value of the propagation delay and output transition time can be calculated with the extrapolation formula (CL in pF).

Table 8. Dynamic power dissipationVSS = 0V; tr = tf ≤ 20ns; Tamb = 25 °C.SymbolParameterPD

dynamic power dissipation

VDD5V10V15V

Typical formula

PD = 1300 × fi + Σ(fo × CL) × VDD2 (μW)PD = 00 × fi + Σ(fo × CL) × VDD2 (μW)PD = 18700 × fi + Σ(fo × CL) × VDD2 (μW)

where:

fi = input frequency in MHz;fo = output frequency in MHz;CL = output load capacitance in pF;Σ(fo × CL) = sum of the outputs;VDD = supply voltage in V.

Product data sheetRev. 06 — 2 December 2009 5 of 14

NXP Semiconductors

HEF4093B

Quad 2-input NAND Schmitt trigger

12.Waveforms

trVIinput0 Vtf90 %VM10 %tPHLtPLHVOHoutputVOL90 %VM10 %tTHLtTLH001aag197Measurement points are given in Table9.Logic levels: VOL and VOH are typical output voltage levels that occur with the output load.tr, tf = input rise and fall times.Fig 4.Table 9.VDD

Propagation delay and output transition timeMeasurement points

InputVM0.5VDD

Supply voltage5 V to 15 V

OutputVM0.5VDD

VDDGVIDUTRTCLVO001aag182Test data given in Table10.Definitions for test circuit:DUT = Device Under Test.CL=load capacitance including jig and probe capacitance.RT=termination resistance should be equal to the output impedance Zo of the pulse generator.Fig 5.Table 10.VDD

Test circuitTest data

Supply voltage5V to 15V

InputVI

VSS or VDD

tr, tf≤20ns

LoadCL50 pF

Product data sheetRev. 06 — 2 December 2009 6 of 14

NXP Semiconductors

HEF4093B

Quad 2-input NAND Schmitt trigger

13.Transfer characteristics

Table 11.Transfer characteristics

VSS=0V;Tamb = 25°C; see Figure6 and Figure7.SymbolParameterVT+

positive-going threshold voltage

Conditions

VDD5V10V15V

VT−

negative-going threshold voltage

5V10V15V

hysteresis voltage

5V10V15V

Min1.93..71.5340.40.60.7

Typ2.95.27.32.24.26.00.71.01.3

Max3.57113.16.410.3---

UnitVVVVVVVVV

VOVIVT+VT−VHVHVIVT+001aag107VO001aag108Fig 6.VT−Transfer characteristicFig 7.Waveforms showing definition of VT+ and VT− (between limits at 30% and 70%) and VHHEF4093B_6© NXP B.V. 2009. All rights reserved.

Product data sheetRev. 06 — 2 December 2009 7 of 14

NXP Semiconductors

HEF4093B

Quad 2-input NAND Schmitt trigger

200IDD(μA)001aag1091000IDD(μA)001aag110100500002.5VI (V)5005VI (V)10a.VDD = 5V; Tamb = 25 °C2000IDD(μA)b.VDD = 10V; Tamb = 25 °C001aag11110000010VI (V)20c. VDD = 15V; Tamb = 25 °CFig 8.Typical drain current as a function of inputHEF4093B_6© NXP B.V. 2009. All rights reserved.

Product data sheetRev. 06 — 2 December 2009 8 of 14

NXP Semiconductors

HEF4093B

Quad 2-input NAND Schmitt trigger

10VI(V)VT+VT−5001aag11202.557.51012.515VDD (V)17.5Tamb = 25 °C.Fig 9.Typical switching levels as a function of supply voltage14.Application information

Some examples of applications for the HEF4093B are:

•Wave and pulse shapers•Astable multivibrators•Monostable multivibrators

CpVDD1413VDD27001aag113RVDD14132CVDD7001aag114Fig 10.Astable multivibratorFig 11.Schmitt trigger driven via a high-impedanceinputIf a Schmitt trigger is driven via a high-impedance (R > 1 kΩ), then it is necessary to

V–VSSC---->----DD--------------------; otherwise oscillation can occur incorporate a capacitor C with a value of --CPVHon the edges of a pulse.

Cp is the external parasitic capacitance between inputs and output; the value depends on

the circuit board layout.

Remark: The two inputs may be connected together, but this will result in a larger through-current at the moment of switching.

HEF4093B_6

Product data sheetRev. 06 — 2 December 2009 9 of 14

NXP Semiconductors

HEF4093B

Quad 2-input NAND Schmitt trigger

15.Package outline

DIP14: plastic dual in-line package; 14 leads (300 mil)SOT27-1

Dseating planeMEA2ALA1cZeb1b148wM(e )1MHpin 1 indexE1705scale10 mmDIMENSIONS (inch dimensions are derived from the original mm dimensions)UNITmminchesNote1. Plastic or metal protrusions of 0.25 mm (0.01 inch) maximum per side are not included. OUTLINEVERSIONSOT27-1 REFERENCES IEC050G04 JEDECMO-001 JEITASC-501-14EUROPEANPROJECTIONAmax.4.20.17A 1min.0.510.02A 2max.3.20.13b1.731.130.0680.044b10.530.380.0210.015c0.360.230.0140.009D(1)19.5018.550.770.73E(1)6.486.200.260.24e2.0.1e17.620.3L3.603.050.140.12ME8.257.800.320.31MH10.08.30.390.33w0.20.01Z(1)max.2.20.087ISSUE DATE99-12-2703-02-13Fig 12.Package outline SOT27-1 (DIP14)

HEF4093B_6

Product data sheetRev. 06 — 2 December 2009 10 of 14

NXP Semiconductors

HEF4093B

Quad 2-input NAND Schmitt trigger

SO14: plastic small outline package; 14 leads; body width 3.9 mmSOT108-1

DEAXcyHEvMAZ148QA2pin 1 indexA1(A )3θLpA17LwMdetail Xebp02.5scale5 mmDIMENSIONS (inch dimensions are derived from the original mm dimensions)UNITmmAmax.1.75A10.250.10A21.451.25A30.250.01bp0.490.36c0.250.19D(1)8.758.55E(1)4.03.80.160.15e1.270.05HE6.25.8L1.05Lp1.00.4Q0.70.60.0280.024v0.250.01w0.250.01y0.10.004Z(1)0.70.30.0280.012θoinches0.0690.0100.0570.0040.0490.0190.01000.350.0140.00750.340.2440.0390.0410.2280.0168o0Note1. Plastic or metal protrusions of 0.15 mm (0.006 inch) maximum per side are not included. OUTLINEVERSION SOT108-1 REFERENCES IEC 076E06 JEDEC MS-012 JEITAEUROPEANPROJECTIONISSUE DATE99-12-2703-02-19Fig 13.Package outline SOT108-1 (SO14)

HEF4093B_6

Product data sheetRev. 06 — 2 December 2009 11 of 14

NXP Semiconductors

HEF4093B

Quad 2-input NAND Schmitt trigger

16.Revision history

Table 12.Revision history

Release date20091202

Data sheet statusProduct data sheet

Change notice-SupersedesHEF4093B_5

Document IDHEF4093B_6Modifications:HEF4093B_5HEF4093B_4HEF4093B_CNV_3HEF4093B_CNV_2

••

Section 9 “Recommended operating conditions”, Δt/ΔV values updated.Section 10 “Static characteristics”,VIH and VIL values removed.

Product data sheetProduct data sheetProduct specificationProduct specification

----HEF4093B_4HEF4093B_CNV_3HEF4093B_CNV_2-

2009072820080612 1995010119950101

Product data sheetRev. 06 — 2 December 2009 12 of 14

NXP Semiconductors

HEF4093B

Quad 2-input NAND Schmitt trigger

17.Legal information

17.1Data sheet status

Document status[1][2]Objective [short] data sheetPreliminary [short] data sheetProduct [short] data sheet

[1][2][3]

Product status[3]DevelopmentQualificationProduction

Definition

This document contains data from the objective specification for product development. This document contains data from the preliminary specification. This document contains the product specification.

Please consult the most recently issued document before initiating or completing a design. The term ‘short data sheet’ is explained in section “Definitions”.

The product status of device(s) described in this document may have changed since this document was published and may differ in case of multiple devices. The latest product status information is available on the Internet at URLhttp://www.nxp.com.

17.2Definitions

Draft — The document is a draft version only. The content is still under internal review and subject to formal approval, which may result in modifications or additions. NXP Semiconductors does not give any representations or warranties as to the accuracy or completeness of

information included herein and shall have no liability for the consequences of use of such information.

Short data sheet — A short data sheet is an extract from a full data sheet with the same product type number(s) and title. A short data sheet is intended for quick reference only and should not be relied upon to contain detailed and full information. For detailed and full information see the relevant full data sheet, which is available on request via the local NXP Semiconductors sales office. In case of any inconsistency or conflict with the short data sheet, the full data sheet shall prevail.

damage. NXP Semiconductors accepts no liability for inclusion and/or use of NXP Semiconductors products in such equipment or applications and therefore such inclusion and/or use is at the customer’s own risk.

Applications — Applications that are described herein for any of these products are for illustrative purposes only. NXP Semiconductors makes no representation or warranty that such applications will be suitable for the specified use without further testing or modification.

Limiting values — Stress above one or more limiting values (as defined in the Absolute Maximum Ratings System of IEC60134) may cause permanent damage to the device. Limiting values are stress ratings only and operation of the device at these or any other conditions above those given in the

Characteristics sections of this document is not implied. Exposure to limiting values for extended periods may affect device reliability.

Terms and conditions of sale — NXP Semiconductors products are sold subject to the general terms and conditions of commercial sale, as published at http://www.nxp.com/profile/terms, including those pertaining to warranty, intellectual property rights infringement and limitation of liability, unless

explicitly otherwise agreed to in writing by NXP Semiconductors. In case of any inconsistency or conflict between information in this document and such terms and conditions, the latter will prevail.

No offer to sell or license — Nothing in this document may be interpreted or construed as an offer to sell products that is open for acceptance or the grant, conveyance or implication of any license under any copyrights, patents or other industrial or intellectual property rights.

Export control — This document as well as the item(s) described herein may be subject to export control regulations. Export might require a prior authorization from national authorities.

17.3Disclaimers

General — Information in this document is believed to be accurate and

reliable. However, NXP Semiconductors does not give any representations or warranties, expressed or implied, as to the accuracy or completeness of such information and shall have no liability for the consequences of use of such information.

Right to make changes — NXP Semiconductors reserves the right to make changes to information published in this document, including without

limitation specifications and product descriptions, at any time and without notice. This document supersedes and replaces all information supplied prior to the publication hereof.

Suitability for use — NXP Semiconductors products are not designed, authorized or warranted to be suitable for use in medical, military, aircraft, space or life support equipment, nor in applications where failure or

malfunction of an NXP Semiconductors product can reasonably be expected to result in personal injury, death or severe property or environmental

17.4Trademarks

Notice: All referenced brands, product names, service names and trademarks are the property of their respective owners.

18.Contact information

For more information, please visit: http://www.nxp.com

For sales office addresses, please send an email to: salesaddresses@nxp.com

Product data sheetRev. 06 — 2 December 2009 13 of 14

NXP Semiconductors

19.Contents

1General description. . . . . . . . . . . . . . . . . . . . . . 12Features . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 13Applications. . . . . . . . . . . . . . . . . . . . . . . . . . . . 14Ordering information. . . . . . . . . . . . . . . . . . . . . 15Functional diagram . . . . . . . . . . . . . . . . . . . . . . 26Pinning information. . . . . . . . . . . . . . . . . . . . . . 26.1Pinning . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 26.2Pin description . . . . . . . . . . . . . . . . . . . . . . . . . 27Functional description . . . . . . . . . . . . . . . . . . . 38Limiting values. . . . . . . . . . . . . . . . . . . . . . . . . . 39Recommended operating conditions. . . . . . . . 410Static characteristics. . . . . . . . . . . . . . . . . . . . . 411Dynamic characteristics. . . . . . . . . . . . . . . . . . 512Waveforms . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 613Transfer characteristics . . . . . . . . . . . . . . . . . . 714Application information. . . . . . . . . . . . . . . . . . . 915Package outline. . . . . . . . . . . . . . . . . . . . . . . . 1016Revision history. . . . . . . . . . . . . . . . . . . . . . . . 1217Legal information. . . . . . . . . . . . . . . . . . . . . . . 1317.1Data sheet status . . . . . . . . . . . . . . . . . . . . . . 1317.2Definitions. . . . . . . . . . . . . . . . . . . . . . . . . . . . 1317.3Disclaimers. . . . . . . . . . . . . . . . . . . . . . . . . . . 1317.4Trademarks. . . . . . . . . . . . . . . . . . . . . . . . . . . 1318Contact information. . . . . . . . . . . . . . . . . . . . . 1319

Contents. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 14

HEF4093B

Quad 2-input NAND Schmitt trigger

Please be aware that important notices concerning this document and the product(s)described herein, have been included in section ‘Legal information’.

For more information, please visit: http://www.nxp.com

For sales office addresses, please send an email to: salesaddresses@nxp.com

Date of release: 2 December 2009Document identifier: HEF4093B_6

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